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Impedance Matching & Utility•3-Port (RF, DC, RF+DC)

Wideband Bias Tee (LC Diplexer)

Injects DC supply voltage onto an active RF coaxial line without RF leakage.

Wideband Bias Tee (LC Diplexer) — Photorealistic 3D PCB Hardware Render
NIKOLARF
Insertion Loss
< 0.35 dB RF insertion loss (Port 1 to Port 3)
Isolation / Return Loss
> 35 dB RF-to-DC port isolation across full band
Bandwidth
10 MHz to 26.5 GHz (Broadband)
Power Rating
DC current up to 2.5A; RF power up to 25W CW

Device Topology & Electromagnetic Behavior

A 3-port diplexing network pairing a conical ultra-broadband RF inductor (choke) on the DC port with a series DC-blocking capacitor on the RF port. Allows DC power to travel up a single coaxial transmission line to power remote masthead low-noise amplifiers (LNAs) or active antennas while strictly blocking RF from entering the DC power supply.

ANALYTICAL FORMULATIONS & S-MATRIX MAPPING
X_L = 2π f L_choke gg 50 Ω (High RF Impedance on DC Port)
• Inductor presents near-infinite impedance to RF, preventing signal leakage into DC rail.
X_C = (1) / (2π f C_block) ll 50 Ω (Zero RF Impedance in Signal Path)
• Series capacitor passes RF frequencies with near-zero insertion loss.
Recommended Substrate Stackup

Rogers RO4350B or RT/duroid® 5880 for high-frequency microstrip launches.

Nikola RF Fabrication Directives
  • Conical coil inductor geometry to damp self-resonant frequencies (SRF) across broadband.
  • High-voltage rated low-ESR ceramic chip capacitor on the RF signal path.
Full-Lifecycle Engineering Services

Design, 3D EM Simulation & Handoff for Wideband Bias Tee (LC Diplexer)

We provide turnkey synthesis, multi-frequency full-wave simulation, and fabrication-ready packaging for the Wideband Bias Tee (LC Diplexer).

1. 3D Full-Wave FEM Modeling

Complete Ansys HFSS 3D CAD modeling with true edge-launch SMA or SMP connectors, via fence stitching, and adaptive mesh refinement down to ΔS < 0.007.

2. Sensitivity & Tolerance Sweeps

Monte Carlo statistical analysis over copper etching tolerances (±15 µm) and substrate permittivity variations to guarantee first-pass high-yield manufacturing.

3. Manufacturing Handoff

Delivery of verified simulation models, parameterized layout geometries, and photolithography-compliant Gerber RS-274X fabrication packages.

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Submit your operational frequency, bandwidth, power handling, and target substrate stackup. Our electromagnetic engineers will deliver a verified feasibility audit within 48 hours.

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We treat client intellectual property with military-grade rigor. Prior to receiving proprietary disclosure files, patent drafts, or trade secret geometries, we execute standard bilateral NDAs.

Bilateral NDA Standard

Mutual non-disclosure executed before file transmission.

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Simulations run on dedicated air-gapped workstations.

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Full audit trail for IP litigation and patent defense.

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Computational Electromagnetics • Microwave Co-Design • Strict Engineering Confidentiality